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 Semiconductor
January 1999
CT T ODU MEN E PR PLACE -7747 T 2 OLE RE 0-44 OBS ENDED 1-80 .com MM ications arris l ECO h NO R ntral App entapp@ c Ce : Call or email
CA3256
25MHz, BiMOS Analog Video Switch and Amplifier
[ /Title (CA32 56) /Subject (25MH z, BiMO S Analog Video Switch and Amplifier) /Autho r () /Keywords (Harris Semiconductor, 4x1, video crosspoint switch, multiplexer multiplexor, cable driver, 5x1, moni tor output, adjustable gain,
Features
* 5 Multiplex Video Channels - 1 Independent Channel - 4 Channels with Enable * 4 LED Channel Indicator Outputs * Wideband Video Amplifier . . . . . . . . 25MHz Unity Gain * Adjustable Video Amplifier Gain * High Signal-Drive Capability
Description
The CA3256 BiMOS analog video switch has five channels of CMOS multiplex switching for general-purpose videosignal control. One of four CMOS channels may be selected in parallel with channel 5. The CMOS switches are inputs to the video amplifier but may be used in bilateral switching between channels 1 to 4 and channel 5. The analog switches of channels 1 to 4 are digitally controlled with logic level conversion and binary decoding to select 1 of 4 channels. The enable function controls channels 1 to 4 but does not affect channel 5. LED output drivers are selected with the channel 1-to-4 switch selection to indicate the ONchannel. Channel 5 may be used as a monitor output for data or signal information on channels 1 to 4. The transmission gate switches shown in the block diagram of the CA3256 are configured in a "T" design to minimize feedthrough. When the switch is off, the shunt or center of the "T" is grounded. The amplifier has high input impedance to minimize the RON transmission gate insertion loss. The amplifier output impedance is typically 5 in a complementary symmetry output. The amplifier can directly drive a nominal 75 coaxial cable to provide line-to-line video switching. The gain of the amplifier is programmable by different feedback resistor values between pins 8 and 9. Compensation may also be used between these pins for an optimally flat frequency response. An internal regulated 5V bias reference with temperature compensation permits stable direct-coupled output drive and minimizes DC offset during signal switching.
Applications
* Video Multiplex Switch * 75 Video Amplifier/Line Driver * Video Signal-Level Control * Monitor Switching Control * TV/CATV Audio/Video Switch * Video Signal Adder/Fader Control
Part Number Information
PART NUMBER CA3256E CA3256M TEMP. RANGE (oC) -40 to 85 -40 to 85 PACKAGE 18 Ld PDIP 20 Ld SOIC PKG. NO. E18.3 M20.3
Pinouts
CA3256 (PDIP) TOP VIEW CA3256 (SOIC) TOP VIEW
IN 3 LED 4 IN 4 GND VENABLE CONTROL C FEEDBACK AMP OUT
1 2 3 4 5 6 7 8 9
18 CONTROL B 17 IN 2 16 CONTROL A 15 IN 1 14 V+ 13 IN/OUT 5 12 LED 1 11 LED 2 10 LED 3
IN3 LED4 IN4 GND VENABLE CONTROL C FEEDBACK AMP OUT
1 2 3 4 5 6 7 8 9
20 CONTROL B 19 IN2 18 CONTROL A 17 NC 16 IN1 15 V+ 14 IN/OUT5 13 NC 12 LED1 11 LED2
LED3 10
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright
(c) Harris Corporation 1999
File Number
1769.5
8-1
CA3256 Block Diagram
IN/OUT 5 13 V+ 14 4 3 3 1 2 17 1 15 V+ BIAS REG VTG FEED BACK 8 1K 10K AMPLIFIER OUTPUT 9
+ 10K
4
LED DRIVER OUTPUTS 12 CHANNEL 1
TG
11 ENABLE 6 LOGIC LEVEL CONV. BINARY TO 1 OF 4 WITH ENABLE CHANNEL 2 TG
10 CHANNEL 3 A 16 B 18 TG V- 5 C 7 IN TG SW CONTROL OUT IN OUT IN OUT TG 2 CHANNEL 4
SW OPEN
SW CLOSED
(DIP PIN OUT)
Switch Control Logic
CHANNEL NUMBER 1 2 3 4 5 + (1-4) (Note) 5 None C 0 0 0 0 1 1 0 X A 0 0 1 1 Channel 1-4 Channel 5 Only X B 0 1 0 1 ENABLE 1 1 1 1 1 0 0
NOTE: For Maximum Video Bandwidth, Use Single Channel Selections
8-2
CA3256
Absolute Maximum Ratings
DC Supply Voltage Range (V+ to V-) . . . . . . . . . . . . . . . . . . . . . 18V Control Input Voltage Range, All Inputs . . . . . . . . . . . . . . . . V+ to VSignal Input Voltage Range, Channel 1-5 . . . . . . . . . . . . . . . .3VP-P Amplifier Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA DC LED Sink Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
TA = 25oC, V+ = 12V; V- = GND SYMBOL TYPICAL VALUES 10 to 17 ICC SWITCH 20 AMPLIFIER 35 -0.8 AOL 10 25 10 5 2.5 7 5 1 1 0.5 30 16 dB dB MHz MHz dB dB k VP-P VP-P V % Degree dB s mA mA V UNITS V mA
PARAMETER Power Supply Voltage V+ to VPower Supply Current
Open Loop Gain Programmable Gain, FB Adjustment Range Full Power Bandwidth Unity Gain Bandwidth, 1k, 7pF Compensation Insertion Loss Signal Feedthrough, 5MHz Input Impedance Output Impedance Maximum Input Voltage Maximum Output Voltage, Clipped Reference Bias Output Voltage (V8 - V-) Differential Gain Differential Phase Off Isolation, Channel to Channel, ZIN = 75 LLC Switch Turn On/Off Time Delay Maximum LED Sink Current Typical Output Source Current Channel Control Switch A, B, C and EN Threshold (Notes 2, 3)
AOL
-0.8 -66
ZIN ZOUT VI(MAX) VO(MAX)
3 -66 -
VTH
Approximately (V+ - V-)/2
CAUTION: Connect the V- power supply voltage before or during the V+ turn-on. NOTES: 2. Threshold value is referenced to GND. 3. VTH is restricted by the equation, VTH < V+ -1.
8-3
CA3256
Electrical Specifications
TA = 25oC, V+ = 12V, VLED = 12V, V- = GND, Pin 4 = GND, Feedback Switch Closed, VHIGH = 9V, VLOW = 3V (See Figure 1), Unless Otherwise Specified INPUTS CH 1 PARAMETERS Supply Current, VLED = 0V Dual Supply Current V+ = +7V, V- = -5V Amplifier Output Voltage, Open Loop VLED = 0V Amplifier Output Voltage, Closed Loop, VLED = 0V IOUT (MAX) (Source) Open Loop IOUT (MAX) (Sink) Open Loop Input Leakage Channel 1-5 Channel Control Input A, B, C, Enable Leakage LED Off Voltage, VOFF LED On Voltage, VON Switch Resistance, RDS RDS Match Amplifier Output Offset, VO , Feedback Switch Closed V+ = +7V, V- = -5V Closed Loop Gain NOTES: 4. VOUT = +7V. 5. VOUT = +3V. 6. DIP Pinout. 0V 0V CH 2 CH 3 CH 4 CH 5 A CHANNEL SWITCH CONTROL B C ENABLE NOTE 6 TEST PIN 6 PIN# 3V 14
PIN 15 PIN 17 PIN 1 0V 0V 0V
PIN 3 PIN 13 PIN 16 PIN 18 PIN 7 0V 0V 3V 3V 3V
MIN 10
TYP MAX UNITS 16 22 mA
0V
0V
0V
0V
0V
0V
0V
0V
7V
14/5
10
20
26
mA
0V
0V
0V
0V
0V
3V
3V
3V
3V
9
6
8.5
10
V
0V
0V
0V
0V
0V
3V
3V
3V
3V
9
4.8
5.1
5.4
V
0V
0V
0V
0V
0V
3V
3V
3V
3V
9 Note 4 9 Note 5 1, 3, 15, 17 6, 7, 16, 18
-
-70
-25
mA
0V
0V
0V
0V
0V
3V
3V
3V
3V
10
16
-
mA
3V
3V
3V
3V
3V
3V
3V
3V
3V
-15
5
15
nA
0V
0V
0V
0V
0V
Measure at 3V, 9V each; Enable and Channel Switching Control Inputs Select Channel 0-5
-20
10
20
nA
0V
0V
0V
0V
0V
2, 10, 11, 12 2, 10, 11, 12 9V
11.97 11.99
-
V
0V
0V
0V
0V
0V
Select Channel 0-5
-
0.1
0.3
V
100A Input Each Switch, Channel 1-4 + 5
Select Channel 1-4
9V
0.8
1.1
1.4
k
Calculation: (Max RDS - Min RDS)/Min RDS 0V 0V 0V 0V 0V 0V 7V
9
-100
3.6 45
5 100
% mV
3V
0V
0V
0V
0V
3V
3V
3V
9V
9
-0.5
-0.1
0.5
dB
8-4
CA3256 Test Circuits
V5 V+ 14 VBIAS (V- +5V) 10K IN 1 15 TG-1 10K OUTPUT AMP 1.1K IN 2 17 TG-2 1.1K IN 3 1 TG-3 1.1K IN 4 3 LLC ENABLE AND CHAN 1-4 SELECT TG-5 TG-4 1.1K 4 2 3 10 2 11 1 12 VLED +12 V +12 V FEEDBACK 8 FEEDBACK SWITCH
BIAS REG
1K
AMP OUT 9
+
IN/OUT 5 13
6 ENABLE
16 A
18 B
7C
4
GND
CONTROL INPUTS (CHANNEL SELECT)
FIGURE 1. CA3256 TEST CIRCUIT (DIP PINOUT)
Application Information
CMOS analog switches are available in a wide variety of forms, and have been known and used for some time. There are a number of advantages to using the CMOS transmission gate as a switch: * * * * * * * * * Ideal Suitability to Series Cascade Arrangements Simple Multiple Parallel Input Switching Arrangements No Bipolar Junctions and, Hence, No Offset Very Low Power Consumption Wide Signal-Swing Capability Fast Multiplexing and Video Switching Wide Bandwidth Low RON Channel Resistance Bidirectional Signal Handling speed as advantages, the price is high in voltage offset and current drain. The integrated device solution that is offered here is in the use of the BiMOS technology, where both the CMOS and bipolar processes complement each other to provide CMOS switching with bipolar amplifiers. The BiMOS process allows several CMOS switches to be coupled to a bipolar drive-amplifier in the same process to exploit the best of two technologies. Other advantages are gained when the BiMOS process is used for an IC video-switch amplifier design. The BiMOS process calls for a P-substrate and, therefore, isolated N-epitaxial wells can be built for both N and P channel parts. The boats provide for better isolation of the N and P channels. The N and P wells in a transmission-gate cell can be switched between source and rail; therefore, they have a smaller body effect on both N and P devices, which results in better gain linearity. Where desired, oxide capacitors are available for bipolar amplifier compensation. CA3256 Video-Switch Amplifier The Block Diagram shows the functional diagram of the CA3256, which consists of five MOS channels, each comprising a three-element T-switch. The output of the five switches is made common and fed into the input of a bipolar
An Integrated Video-Switch Amplifier
Commonly, integrated video-switch amplifiers have been fabricated in the bipolar technology using differential amplifiers in a current-switching mode. In this form, two differential pairs are needed for two input-signal sources. The handling of multiple sources is very much more complex. The advantages of the CMOS video-switch amplifier have already been noted. While the bipolar video switch has high output drive and switching
8-5
CA3256
buffer amplifier. The T-switch, together with the input impedance of the buffer, is typically 10k, and has an insertion loss of approximately 0.8dB. The T-switch was designed to handle up to 3VP-P input signal with low distortion. The T-switches of the CA3256 conform to a break-before-make format; hence, shorting to ground is eliminated. The amplifier is programmable for gain and, typically, can provide a gain of 1 into a 75 load or a gain of 5 into a 1k load. The maximum output signal swing with linearity is greater than 5VP-P for (V+ to V-) greater than or equal to 12V, while the maximum output current is approximately 20mA. The amplifier has base-current compensation to reduce offset and a temperature compensated 5V zener referenced bias. Other features include LED-selector indicators for channels 1 through 4. The fifth channel is independently selectable for use as a separate input or output in parallel with any on channel, and may be used as a monitor, or for pass-through, signal summing, or parallel distribution. In the application, the user has the option to specify V- = -5V for the switch and a ground reference for the amplifier input and output. Alternatively, the CA3256 may be used with a single +12V supply. The logic select for channels 1 through 4 is controlled by the A, B and Inhibit lines with ground to V+ logic switching. The logic threshold is approximately (V+ - V-)/2 referenced to ground. DC coupling may also be used at the output (when V- is returned to a -5V supply). For the circuit of Figure 3, AC coupling is used at the output and input. The switching bias arrangement shown provides for stable bias across each switch when in the off position to minimize transients when the input is switched.
Typical Applications
V100K -5V V+ +7V TO +12V RF
5
14 V- +5V
8 1K AMPLIFIER TO CABLE OUTPUT 9 75 OUTPUT AMP LED INDICATOR CHANNEL 1 VLED 1 12 75 OUT
100K
100K
BIAS REG
10K + 10K
-
CHANNEL 1 INPUT
15
TG-1
17
TG-2 LED INDICATOR CHANNEL 2 2 11
2 OF 5 INPUTS SHOWN
1
TG-3 LED INDICATOR CHANNEL 3 3 10
3 LLC ENABLE AND CHAN 1-4 SELECT 13
TG-4 LED INDICATOR CHANNEL 4 4 2 WHERE AMPLIFIER GAIN: R F + 1K AV = 1 + ---------------------- x0.9 10K i.e., FOR AV = 1.8 A B 18 SELECT CHANNEL 7 5 4.7K C 4 4.7K GND RF = 9k
CHANNEL 5 INPUT/ OUTPUT
TG-5
ENABLE CHANNEL 1-4
6 4.7K 4.7K
16
SELECT CHANNEL 1-4
FIGURE 2. TYPICAL APPLICATION WITH DIRECT-COUPLED OUTPUT AND V- = -5V (DIP PINOUT)
8-6
CA3256
V0.1F 100K 0.047F 0.047F CCOMP 2.2F 5 14 2.2F 8 VOUT 2 75 10K 10K 15 75 1 17 TG-2 LED INDICATOR CHANNEL 2 2 OF 5 INPUTS SHOWN 2 1 TG-3 LED INDICATOR CHANNEL 3 3 3 LLC ENABLE AND CHAN 1-4 SELECT 13 75 A 6 4.7K 4.7K 16 18 4.7K B 7 SELECT CHANNEL 5 4.7K C 4 GND TG-5 TG-4 LED INDICATOR CHANNEL 4 4 2 10 11 12 TG-1 + 9 OUTPUT AMP 220F 75 VOUT 1 V+ +12 TO +18V RF
100K
100K V- +5V BIAS REG
1K
2.2F CHANNEL 1 INPUT
LED INDICATOR CHANNEL 1
VLED
CHANNEL 5 INPUT/ OUTPUT
2.2F
WHERE AMPLIFIER GAIN: R F + 1K AV = 1 + ---------------------- x 0.9 10K
ENABLE CHANNEL 1-4
SELECT CHANNEL 1-4
FOR THIS CIRCUIT: V+ = +12V AV = 1.1 BW = 18MHz (SINEWAVE) VOUT = 1VP-P RF = 1K
Pulse Performance = 20ns tR for 0V to 2V Pulse. See Figure 4 for frequency response.
VIN
V+ = +12V, RF = 1k, CCOMP = 6pF.
VOUT
FIGURE 3. TYPICAL APPLICATION WITH AC-COUPLED INPUT AND OUTPUT, AND V- = GND (DIP PINOUT)
8-7
CA3256
VIN = 200mVP-P, AT LOW FREQUENCY 0dB REF. EQUAL 1.13 x GAIN, TA = 25oC 0
7pF C COMP
-2 1k GAIN (dB) -4
8 RF 1k VOUT + 9 220F TG OUTPUT AMPLIFIER 75
-6
VIN
-8
-10 0.01 0.1 1 FREQUENCY (MHz) 10 100
FIGURE 4A. CLOSED LOOP RESPONSE WITH COMPENSATION CAPACITOR, CCOMP , AND RF , SEE FIGURE 4B
FIGURE 4B. TEST CIRCUIT FOR FIGURE 4A
31
VOUT = 200mVP-P , TA = 25oC
29 8 27 GAIN (dB) NO FEEDBACK
25 9 23 V IN TG 21 + OUTPUT AMPLIFIER 220F
VOUT
150
19 0.01 0.1 1 FREQUENCY (MHz) 10 100
FIGURE 4C. OPEN LOOP RESPONSE WITH NO FEEDBACK, SEE FIGURE 4D
FIGURE 4D. TEST CIRCUIT FOR FIGURE 4C
FIGURE 4. FREQUENCY RESPONSE OF AC COUPLED CIRCUIT OF FIGURE 3
8-8
CA3256
10K (NOTE) V+ 10K OFF SET ADJ. 15pF 5 14 8 1K V- +5V BIAS REG IN 1 GEN 15 75 1 IN 2 75 2 IN 3 75 3 IN 4 75 3 LLC ENABLE AND CHAN 1-4 SELECT 13 75 6 ENABLE 16 A 18 B 7 GND TG-4 10 LED 1.2K 1 TG-3 11 LED 1.2K 17 TG-2 12 LED 1.2K TG-1 1K VOUT = 2VP-P 10K 10K + OUTPUT AMP V9 510 75 VLED RF
VV- = -5V V+
4
2 LED 1.2K
IN 5
TG-5
C 4
NOTE: Adjust offset for voltage at pin 9 equal to 0V with no AC signal and one channel "ON". Dynamic clamping may be accomplished by error current feedback to pin 8.
FIGURE 5. TYPICAL APPLICATION WITH DC-COUPLED INPUT AND OUTPUT, AND OFFSET ADJUST. OUTPUT VOLTAGE IS FIXED BY THE V+ AND V- RANGE. (DIP PINOUT)
+1 0 -1 10 0 1s/DIV.
2VP-P
10V
FIGURE 6A. GATED OUTPUT FOR V+ = +12V ENABLE = HIGH, CONTROL B = C = LOW, CONTROL A = 10V PULSE. THE BURST OUTPUT IS DELAYED ~ 400ns AT tON, tOFF.
0.5V/DIV.
10s/DIV.
10s/DIV.
FIGURE 6B. STANDARD NTS COLOR BAR
FIGURE 6C. UNIFORM STEP SIGNAL WITH 3.58MHz MODULATION
FIGURE 6. PERFORMANCE OF CIRCUIT IN FIGURE 5
8-9
0.5V/DIV.
CA3256
7pF 1K 8 75 9 75 VOUT AV = 1.1 BW = 18MHz VOUT = 1VP-P 2pF 11K 8 9 470 75 VOUT AV = 2 BW = 15MHz VOUT = 2VP-P
NOTE: 470 added to increase source drive current.
FIGURE 7A.
FIGURE 7B.
2pF 1K 8 9 AV = 1.1 BW = 40MHz (1.2X GAIN PEAK AT 25MHz) VOUT = 200mVP-P VOUT 9 75 75 8 VOUT2 VOUT1
VOUT1 AV = 1.1 BW = 15MHz VOUT = 200mVP-P
VOUT2 AV = 2 BW = 26MHz (UNITY GAIN) VOUT = 400mVP-P
FIGURE 7C.
FIGURE 7D.
8 9
NO FEEDBACK
AOL = 30 BW = 250kHz VOUT = 200mVP-P VOUT 8 9
7pF 30K
AV = 3.6 BW = 6MHz VOUT = 200mVP-P
150
VOUT
FIGURE 7E.
FIGURE 7F.
100K 6pF 1K 8 9 280 75 AV = 1.1 BW = 28MHz VOUT = 2VP-P 8 10K 9 RS ADJ. VDC = 5V 150
-
+ 200K
OFFSET ADJ. (SETS DC OUT LEVEL) AV = 1.1 BW = 28MHz VOUT = 2VP-P
NOTE: Add RS to reduce high-frequency slewing.
FIGURE 7G.
FIGURE 7H.
FIGURE 7. OTHER TABULATED RESULTS FOR VARIATIONS OF LOAD AND FEEDBACK (V+ = +12V)
8-10
CA3256
Any combination of switch input circuits can be configured with multiple, parallel, line-drive outputs. The video switch amplifier circuit of Figure 8 illustrates how the CA3256 may be configured in pairs to provide an 8-to-1 video switch amplifier using a 3-bit address to select the input. It is also possible to use the fifth channel input to tie signals to a common bus line for distribution from the selected amplifier; however, distributed capacitance loading will result in reduced bandwidth. The 4 plus 1 combination of input-signal switching provides for a wide assortment of video switch circuit configurations. While the BiMOS process does provide some compromises for both the switch and the amplifier, the combined system is capable of the performance needed in most high-quality, switching applications. As an integrated system, many of the problems in PC-board layout are simplified, and there is a reduction in component count. In its simplest form, with +12V and -5V supplies, the CA3256 may be DC connected at the input and output; the LED indicators need not be connected. Under these conditions, the circuit may be as simple as the one in Figure 8.
A B C A B C EN1 VIN1 1 CH 1-4 VIN2 2 VIN3 3 VIN4 4 CH 5 5 V+ +12V +
-
VOUT
GND VCA3256 -5V
A B C EN2 VIN5 1 VIN6 2 CH 5-8 VIN7 3 VIN8 4 NC 5 +
-
V+ GND VCA3256
+12V
-5V
Summary
While each video-switch amplifier is designed for a specific application and, to that end, is tailored as far as performance to a given set of specifications, the circuit-designer's goal is generally the same in every case: to make the best possible switch for the lowest cost. In this respect, the CA3256 IC switch and amplifier discussed provide an excellent choice for a cost-effective high-performance video-switch amplifier, by taking advantage of the complementary features of both high-speed CMOS and bipolar integrated circuits.
TRUTH TABLE CH 1 2 3 4 5 6 7 8 C 0 0 0 0 1 1 1 1 A 0 0 1 1 0 0 1 1 B 0 1 0 1 0 1 0 1
FIGURE 8. AN 8-TO-1 VIDEO SWITCH AMPLIFIER USING TWO CA3256 DEVICES
8-11


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